Overview of the luna assembler (lavra) supported avr assembler commands. The luna assembler is part of the luna compiler. Not all commands are available for every controller (see datasheet).
abbr.l | description |
---|---|
r | source-/destination register |
rh | upper source-/destination (R16-R31) |
rd | double register R24:25(W), R26:27(X), R28:29(Y), R30:31(Z) |
rp | pointer register X,Y, Z |
ry | pointer register Y, Z |
p | port |
pl | port at lower adress 0 bis 31 |
b7 | bitnumber 0 bis 7 |
k63 | constant 0 bis 63 |
k127 | constant -64 bis +63 |
k255 | constant 0-255 |
k4096 | constant -2048 bis +2047 |
k65535 | constant 0 bis 65535 |
group | function | command | flags | clk |
---|---|---|---|---|
empty command | No Operation | NOP | 1 | |
power management | Sleep | SLeeP | 1 | |
watchdog | Watchdog Reset | WDR | 1 | |
set register | 0 | CLR r | Z N V | 1 |
255 | SeR rh | 1 | ||
constant | LDI rh,k255 | 1 | ||
copy | register » register | MOV r,r | 1 | |
SRAM » register, direct | LDS r,k65535 | 2 | ||
SRAM » register | LD r,rp | 2 | ||
SRAM » register with INC | LD r,rp+ | 2 | ||
DeC, SRAM » register | LD r,-rp | 2 | ||
SRAM, indiziert » register | LDD r,ry+k63 | 2 | ||
port » register | IN r,p | 1 | ||
stack » register | POP r | 2 | ||
program memory(Z) » R0 | LPM | 3 | ||
program memory(Z) » register | LPM r,Z | 3 | ||
program memory(Z) mit INC » register | LPM r,Z+ | 3 | ||
program memory(RAMPZ:Z) | eLPM | 3 | ||
register » SRAM, direkt | STS k65535,r | 2 | ||
register » SRAM | ST rp,r | 2 | ||
register » SRAM with INC | ST rp+,r | 2 | ||
DeC, register » SRAM | ST -rp,r | 2 | ||
register » SRAM, indiziert | STD ry+k63,r | 2 | ||
register » port | OUT p,r | 1 | ||
register » stack | PUSH r | 2 | ||
addition | 8 Bit, +1 | INC r | Z N V | 1 |
8 Bit | ADD r,r | Z C N V H | 1 | |
8 Bit+Carry | ADC r,r | Z C N V H | 1 | |
16 Bit, constant | ADIW rd,k63 | Z C N V S | 2 | |
subtraction | 8 Bit, -1 | DeC r | Z N V | 1 |
8 Bit | SUB r,r | Z C N V H | 1 | |
8 Bit, constant | SUBI rh,k255 | Z C N V H | 1 | |
8 Bit - Carry | SBC r,r | Z C N V H | 1 | |
16 Bit, constant | SBIW rd,k63 | Z C N V S | 2 | |
8 Bit - Carry, constant | SBCI rh,k255 | Z C N V H | 1 | |
multiplication | unsigned integer | MUL r,r | Z C | 2 |
signed integer | MULS r,r | Z C | 2 | |
unsigned/unsigned integer | MULSU r,r | Z C | 2 | |
unsigned floating point | FMUL r,r | Z C | 2 | |
signed floating point | FMULS r,r | Z C | 2 | |
signed/unsigned floating point | FMUL r,r | Z C | 2 | |
rotate | logical, left | LSL r | Z C N V | 1 |
logical, right | LSR r | Z C N V | 1 | |
rotate, left with carry | ROL r | Z C N V | 1 | |
rotate, right with carry | ROR r | Z C N V | 1 | |
arithmetc, right | ASR r | Z C N V | 1 | |
swap nibbles | SWAP r | 1 | ||
binary | and | AND r,r | Z N V | 1 |
and, constant | ANDI rh,k255 | Z N V | 1 | |
or | OR r,r | Z N V | 1 | |
or, constant | ORI rh,k255 | Z N V | 1 | |
exclusive-or | eOR r,r | Z N V | 1 | |
ones complement | COM r | Z C N V | 1 | |
twos complement | NeG r | Z C N V H | 1 | |
bit change | register, set | SBR rh,k255 | Z N V | 1 |
register, reset | CBR rh,255 | Z N V | 1 | |
register, copy to T-Flag | BST r,b7 | T | 1 | |
register, copy to T-Flag | BLD r,b7 | 1 | ||
port, set | SBI pl,b7 | 2 | ||
port, reset | CBI pl,b7 | 2 | ||
status bits | Zero-Flag | SeZ | Z | 1 |
carry flag | SeC | C | 1 | |
negative flag | SeN | N | 1 | |
twos complement overflow flag | SeV | V | 1 | |
half carry flag | SeH | H | 1 | |
signed flag | SeS | S | 1 | |
Transfer Flag | SeT | T | 1 | |
Interrupt enable Flag | SeI | I | 1 | |
Zero-Flag | CLZ | Z | 1 | |
Carry Flag | CLC | C | 1 | |
negative flag | CLN | N | 1 | |
twos complement overflow flag | CLV | V | 1 | |
half carry flag | CLH | H | 1 | |
Signed Flag | CLS | S | 1 | |
Transfer Flag | CLT | T | 1 | |
Interrupt enable Flag | CLI | I | 1 | |
compare | Register, Register | CP r,r | Z C N V H | 1 |
Register, Register + Carry | CPC r,r | Z C N V H | 1 | |
Register, Konstante | CPI rh,k255 | Z C N V H | 1 | |
Register, ≤0 | TST r | Z N V | 1 | |
branchg | jump relativ | RJMP k4096 | 2 | |
jump adress absolute | JMP k65535 | 3 | ||
jump adress implicit (Z) | IJMP | 2 | ||
jump adress implicit (eIND:Z) | eIJMP | 2 | ||
subroutine, relative | RCALL k4096 | 3 | ||
subroutine, adress absolute | CALL k65535 | 4 | ||
subroutine, adress implicit (Z) | ICALL | 4 | ||
subroutine, adress implicit (eIND:Z) | eICALL | 4 | ||
return from subroutine | ReT | 4 | ||
return from interupt | ReTI | I | 4 | |
conditional branch | status bit set | BRBS b7,k127 | 1/2 | |
status bit reset | BRBC b7,k127 | 1/2 | ||
jump if equal | BReQ k127 | 1/2 | ||
jump if not equal | BRNe k127 | 1/2 | ||
jump if overflow | BRCS k127 | 1/2 | ||
jump if carry=0 | BRCC k127 | 1/2 | ||
jump if equal or greater | BRSH k127 | 1/2 | ||
jump if less | BRLO k127 | 1/2 | ||
jump if negative | BRMI k127 | 1/2 | ||
jump if positive | BRPL k127 | 1/2 | ||
jump if greater or equal(signed) | BRGe k127 | 1/2 | ||
jump if less than zero (Vorzeichen) | BRLT k127 | 1/2 | ||
jump if half carry | BRHS k127 | 1/2 | ||
jump if half carry=0 | BRHC k127 | 1/2 | ||
jump if T-Bit is set | BRTS k127 | 1/2 | ||
jump if T-Bit not set | BRTC k127 | 1/2 | ||
jump if twos complement overflow | BRVS k127 | 1/2 | ||
jump if twos complent flag=0 | BRVC k127 | 1/2 | ||
jump if interrupts enabled | BRIe k127 | 1/2 | ||
jump if interrupts disabled | BRID k127 | 1/2 | ||
conditional jumps (skip next command if) | Register bit=0 | SBRC rd,b7 | 1/2/3 | |
register bit=1 | SBRS r,b7 | 1/2/3 | ||
port bit=0 | SBIC pl,b7 | 1/2/3 | ||
port bit=1 | SBIS pl,b7 | 1/2/3 | ||
compare, jump if equal | CPSe r,r | 1/2/3 |